In the case of producing an electronic circuit device by mounting electronic components such as a semiconductor element and a chip resistor on a wiring substrate, the components are generally connected by means of soldering.
For example, when passive components such as a chip resistor and a chip capacitor are secured, a predetermined amount of soldering paste is printed on connecting terminals of the wiring substrate by means of screen printing, and an adhesive strength of the soldering paste is utilized to secure the passive components. After the plurality of passive components are secured, they are placed in a reflow furnace and solder-connected in one lot.
However, the foregoing connecting method has the following problems: as the passive components such as the chip resistor and the chip capacitor are increasingly reduced in size, the solder is likely to be short-circuited between the adjacent connecting terminals when the components are solder-connected; and it becomes more difficult to apply the soldering paste by means of the screen printing and accurately mount the passive components at predetermined positions on the wiring substrate using a component supplier.
As a method of producing the electronic circuit device, not only the passive components but also the semiconductor element are mounted in one lot on the wiring substrate. In the case of a semiconductor element comprising lead pins such as QFP and a chip component such as a chip resistor, for example, the soldering paste is applied in advance to the connecting terminals of the wiring substrate in a manner similar to the foregoing case, and the adhesive strength of the soldering paste is utilized to secure the semiconductor element and the chip component. After that, they are placed in the reflow furnace to be solder-connected in one lot.
In the case of a semiconductor element having the BGA structure, solder balls are provided, and the semiconductor element and the wiring substrate are connected to each other by the solder balls. Further, a semiconductor element having the bare-chip structure is directly mounted on the wiring substrate in some cases. In the direct mounting method, bumps whose material is solder, gold (Au) or the like are formed on surfaces of electrode terminals of the semiconductor element so as to realize the connection via the bumps. The flip-chip mounting method in which such bumps are used is widely employed because the connection can be realized with fine pitches and a highly functional electronic circuit device of smaller size can be realized.
FIGS. 8A-8B are sectional views of a process for describing an example of a conventional electronic circuit device producing method. As shown in FIG. 8A, first, solder paste layers 53 are formed on surfaces of connecting terminals 52 of a wiring substrate 51 provided with conductive wirings (not shown) by means of the screen printing method or the like, and solder bumps 56 are formed on electrode terminals 55 of a semiconductor element 54. Next, positions of the connecting terminals 52 of the wiring substrate 51 and the electrode terminals 55 of the semiconductor element 54 are aligned, and further, positions of a chip component 57 and the connecting terminals 52 of the wiring substrate 51 are aligned. Then, the wiring substrate 51 and the semiconductor substrate 52 are temporarily secured to each other, and the wiring substrate 51 and the semiconductor substrate 52 are heated just the way they are in the reflow furnace so that the solder is melted. Accordingly, the electrode terminals 55 and 58 are electrically connected to the connecting terminals 52 of the wiring substrate 51. The connection state thus obtained is shown in FIG. 8B.
A packaged semiconductor element can be handled in the same manner as the chip component is handled and subjected to the reflow process in the same process. However, a bare-chip semiconductor element often demands the connection with fine pitches, which makes it difficult for the semiconductor element to be subjected to the reflow in the same process as that for the chip component for soldering connection.
In order to cope with the difficulty, there was proposed a conventional method wherein the chip components such as the chip resistor and the chip capacitor are mounted in a first reflow process, and subsequently the electrode terminals of the semiconductor element provided with the bumps are mounted on the connecting terminals of the wiring substrate using supersonic waves (for example, see the Patent Document 1).
In order to realize the flip-chip mounting method, it is necessary to form the bumps on the surfaces of the electrode terminals of the semiconductor element. However, the formation of the bumps becomes more costly as the number of the terminals increases.
Examples of the conventional technology for the formation of the bumps include the plating method, screen printing method and the like. The plating method is capable of forming the bumps with fine pitches, however, the process thereof is complicated. Further, the method is disadvantageous in its productivity and waste disposal. The screen printing method is superior in its productivity; however, requires the use of a printing mask, which makes it difficult for the bumps to be formed with fine pitches.
For example, the following method is available as a method wherein the bumps can be formed with fine pitches by means of the solder. A paste-like composition (solder deposited through chemical reactions) whose main constituents are organic acid lead salt and metallic tin is spread entirely on the wiring substrate provided with the connecting terminals, and the wiring substrate is heated, so that the substitute reaction is generated between lead (Pb) and tin (Sn), and then, alloy of Pb/Sn is selectively deposited on the connecting terminals of the wiring substrate (for example, see the Patent Document 2).    Patent Document 1: 2003-60339 of the Japanese Patent Publication Laid-Open    Patent Document 2: H01-157796 of the Japanese Patent Publication Laid-Open